Resume
Mazen W. K. Ibrahim
Electronics & Communications Engineering undergraduate
Cairo, Egypt · mazenwkamel@outlook.com
Applying for a thesis-based master’s in high-speed serial links, Fall 2027 entry. English and Arabic: fluent.
Education
The American University in Cairo
BS Electronics & Communications Engineering
Double minor: Computer Science & Mathematics · GPA 3.7 · Expected 2027
University of Calgary
Exchange Year
2023 — 2024
Experience
Head of TET System · AUC Peribsen · Heart Hackathon 2026 Grand Finalist
Spring 2025 — Present
Led a seven-engineer TET sub-team; personally built and characterized the 2026 perfboard prototype after the sub-team dissolved. 200 kHz, 62.00% rail-to-load efficiency and 1.66 W into 20 Ω at 5 mm; STM32 power excluded. Thermal testing, full gap characterization, telemetry, protection and power scaling remain open.
Research Assistant · The American University in Cairo
Jun 2024 — May 2026
Under Prof. Yasser Gadallah: co-developed ARGUS with Youssef I. Mohammed (30 Hz, 50+ recording hours), collected EUPB at 15 Hz, and built a PyTorch crossing-prediction pipeline. Integrated Jetson Xavier and ZED 2 cameras with GPIO and a custom control PCB. Second author of a manuscript on pedestrian action prediction, under review at the International Journal of Computer Vision.
Hardware Engineer Intern · Photon Smart
Jan 2026
Reverse-engineered a commercial low-power IoT water-leakage sensor. Produced hierarchical KiCad schematics with reverse-polarity protection and improved power management. Delivered a production-ready PCB layout in KiCad 8.
Software Engineer · SmartTech Systems
May 2023 — Oct 2023
Built Web APIs in ASP.NET Core following Clean Architecture and the repository pattern. Shipped a dynamic timeline view, statistical charts, and a rating system in Angular.
Software Engineer Intern · SmartTech Systems
May 2022 — Oct 2022
Backend service for RFID-UHF reader over 2-way Named Pipes to a WPF frontend. Adobe Illustrator design automation from CSV via ExtendScript; Telegram bot for data parsing.
Selected engineering work
VLSI: designed and characterized a TG-PTL magnitude comparator; contributed to dual-Vt and block gating in a four-person ALU project. Team results are pre-layout only.
Analog: co-developed a fabricated and measured 1.5 kHz KHN filter with Youssef I. Mohammed.
Digital: self-taught Verilog/SystemVerilog; SPI interface with functional simulation testbench. One CMOS inverter layout through DRC/LVS.
Technical tools
KiCad 8, Altium Designer, Cadence Virtuoso, Spectre, STM32, PIC, Python, C/C++, C#, TypeScript, FastAPI, React, .NET, PyTorch, Git, Linux.
Updated 9 October 2026. Contact: mazenwkamel@outlook.com · github.com/mazenwkamel · linkedin.com/in/mazenwkamel